1. Technical Field
The present invention relates to a method and structure for forming a trench in a semiconductor substrate.
2. Related Art
Trenches are typically formed in a semiconductor substrate as part of a process for fabricating semiconductor device such as, inter alia, devices using dynamic random access memory (DRAM). Fabrication of such trenches have utilized a nitride-oxide pad on the semiconductor substrate. A nitride-oxide pad comprises a pad nitride layer (e.g., silicon nitride) on a pad oxide layer (e.g., an oxide such as silicon dioxide). The pad oxide layer directly contacts the semiconductor substrate during the process of forming the trench. The pad nitride layer does not directly contact the semiconductor substrate during the process of forming the trench. The pad nitride layer serves as a polish stop layer for subsequent processes. The pad oxide layer serves as a stress buffer between the nitride layer and the semiconductor substrate, for preventing stresses that might otherwise occur, in an absence of the pad oxide, during subsequent processing in the fabrication of the semiconductor devices.
The aforementioned use of a pad oxide has adverse consequences when used to form a deep trench or a shallow trench. If a pad oxide is used on the semiconductor substrate for forming a deep trench that passes through the nitride-oxide pad, then the deep trench exposes the pad oxide layer along the trench sidewalls. Oxides subsequently grown on the trench sidewalls, as part of fabricating the overall semiconductor device, need to be removed such as by use of a wet etch process. Unfortunately, the wet etchant attacks the pad oxide in addition to the grown oxides on the trench sidewalls, resulting in undercutting into the pad oxide layer under the nitride layer. Each application of chemical etchant to the trench during post-deep trench formation processing increases the undercut in the pad oxide under the nitride layer. Furthermore, the undercut exposes a horizontal silicon surface which is then subject to undesired silicon oxide formation because of the exposure. The undesired silicon oxide thus formed is subject to subsequent attack by the aforementioned chemical etchant. Eventual removal of the pad oxide results in an uneven, rough comer of the semiconductor substrate. The uneven, rough comer has a stepped ledge structure that interferes with an ability to control the geometry of the final structure of the semiconductor device.
If a pad oxide is used on the semiconductor substrate, then forming a shallow trench such as for shallow trench isolation (STI) applications may cause undercutting if post-shallow trench formation processing comprises wet etch oxide removal steps. The undercutting would be caused by the same mechanism that governs undercutting in deep trenches as described supra. Even if the post-shallow trench formation processing does not includes wet etch oxide removal steps, the use of a pad oxide results in unnecessary processing that adds to the overall fabrication costs.
A method is needed to form a trench in a semiconductor substrate without having a pad oxide in contact with the semiconductor substrate.
The present invention provides a method for forming a deep trench in a semiconductor substrate, comprising:
providing the semiconductor substrate;
forming a selectively etchable layer on the semiconductor substrate, wherein the selectively etchable layer is selectively etchable with respect to the semiconductor substrate, and wherein there is an absence of a pad oxide between the selectively etchable layer and the semiconductor substrate;
forming an erosion resistant layer on the selectively etchable layer, wherein the erosion resistant layer is erosion resistant with respect to the semiconductor substrate; and
forming the deep trench through the erosion resistant layer, through the selectively etchable layer, and into the semiconductor substrate.
The present invention provides a method for forming a shallow trench in a semiconductor substrate, comprising:
providing the semiconductor substrate;
forming a selectively etchable layer on the semiconductor substrate, wherein the selectively etchable layer is selectively etchable with respect to the semiconductor substrate, and wherein there is an absence of a pad oxide between the selectively etchable layer and the semiconductor substrate;
forming the shallow trench through the selectively etchable layer and into the semiconductor substrate;
depositing an insulative material in the shallow trench, wherein the insulative material overfills the shallow trench; and
planarizing the insulative material with respect to the shallow trench.
The present invention provides a method for forming a trench structure in a semiconductor substrate, comprising:
forming a deep trench in the semiconductor substrate, comprising:
providing the semiconductor substrate;
forming a selectively etchable layer on the semiconductor substrate, wherein the selectively etchable layer is selectively etchable with respect to the semiconductor substrate, and wherein there is an absence of a pad oxide between the selectively etchable layer and the semiconductor substrate;
forming an erosion resistant layer on the selectively etchable layer, wherein the erosion resistant layer is erosion resistant with respect to the semiconductor substrate;
forming the deep trench through the erosion resistant layer, through the selectively etchable layer, and into the semiconductor substrate; and
removing the erosion resistant layer without formation of undercutting under the selectively etchable layer.
forming a layer of insulation on a sidewall of the deep trench;
partially filling the deep trench with a conductive material;
forming a shallow trench through the selectively etchable layer and into the semiconductor substrate:
depositing an insulative material in the shallow trench, wherein the insulative material fills the shallow trench;
planarizing the insulative material with respect to the shallow trench; and
removing the selectively etchable layer.
The present invention provides a deep trench structure in a semiconductor substrate, comprising:
the semiconductor substrate;
a selectively etchable layer on the semiconductor substrate, wherein the selectively etchable layer is selectively etchable with respect to the semiconductor substrate, and wherein there is an absence of a pad oxide between the selectively etchable layer and the semiconductor substrate; and
an erosion resistant layer on the selectively etchable layer, wherein the erosion resistant layer is erosion resistant with respect to the semiconductor substrate.
The present invention provides a shallow trench structure in a semiconductor substrate, comprising:
the semiconductor substrate; and
a selectively etchable layer on the semiconductor substrate, wherein the selectively etchable layer is selectively etchable with respect to the semiconductor substrate, and wherein there is an absence of a pad oxide between the selectively etchable layer and the semiconductor substrate.
The present invention provides a method and structure for forming a trench in a semiconductor substrate without having a pad oxide in contact with the semiconductor substrate. Since a pad oxide is absent, the present invention does not result in undercutting under the selectively etchable layer, and the present invention does not unnecessarily add to fabrication costs.